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SMAS Memory Map

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Regs Address Length Type Description Details
$211B 4 bytes SNES Register (PPU) ww+++- M7A - Mode 7 Matrix A (also used with $2134/6) ww+++- M7B - Mode 7 Matrix B (also used with $2134/6) ww+++- M7C - Mode 7 Matrix C ww+++- M7D - Mode 7 Matrix D aaaaaaaa aaaaaaaa Note that these are "write twice" registers, first the low byte is written then the high. Current theory is that writes to the register work like this: Reg = (Current<<8) | Prev; Prev = Current; Note that there is only one Prev shared by all these registers. This Prev is NOT shared with the BGnxOFS registers, but it IS shared with the M7xOFS registers. These set the matrix parameters for Mode 7. The values are an 8-bit fixed point, i.e. the value should be divided by 256.0 when used in calculations. See below for more explanation. The product A*(B>>8) may be read from registers $2134/6. There is supposedly no important delay. It may not be operative during Mode 7 rendering. See the section "BACKGROUNDS" below for details. Background Information
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